Publication details


FlowMon Cache Simulation and Analysis of Inter-Packet Gaps

Basic information
Original title:FlowMon Cache Simulation and Analysis of Inter-Packet Gaps
Authors:Miroslava Kramáreková, Daniel Jakubík, Martin Žádník, David Šafránek
Further information
Citation:KRAMÁREKOVÁ, Miroslava, Daniel JAKUBÍK, Martin ŽÁDNÍK a David ŠAFRÁNEK. FlowMon Cache Simulation and Analysis of Inter-Packet Gaps. CESNET, z.s.p.o. Praha: CESNET, z.s.p.o., 2006. CESNET Technical Report Series 32/2006. doi:10.1000/182.Export BibTeX
author = {Kramáreková, Miroslava and Jakubík, Daniel and Žádník, Martin and Šafránek, David},
address = {Praha},
doi = {},
edition = {CESNET, z.s.p.o.},
keywords = {NetFlow},
language = {eng},
location = {Praha},
publisher = {CESNET, z.s.p.o.},
title = {FlowMon Cache Simulation and Analysis of Inter-Packet Gaps},
url = {},
year = {2006}
Original language:English
WWW:link to a new windowFlowMon
Type:R&D Presentation

Precise monitoring of network traffic can help a lot of network applications to improve their functionality. By network monitoring, applications can obtain a better conception concerning flows and packets on the network. In consequence, execution of network applications can be realised more effectively with such knowledge. To satisfy needs of high-speed network monitoring, we have developed a hardware accelerated netflow probe FlowMon which collects data about the network traffic and provides them to the application layer. FlowMon hardware design contains memories configured in a hierarchy which is similar to common computer architectures. In order to find the optimal configuration of such a memory hierarchy in FlowMon, we have analysed information about temporal and spacial localisation of packets in real network traffic. Especially, we developed a simulation model of the cache memory, which, if employed appropriately, can speed up the netflow processing in FlowMon. In this report we present our results regarding simulation of the cache memory. These results make a crucial framework which helps hardware designers to justify the FlowMon design.

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