Publication details
Routing and Level 2 Addressing in a Hardware Accelerator for Network Applications
| Basic information | |
|---|---|
| Original title: | Routing and Level 2 Addressing in a Hardware Accelerator for Network Applications |
| Authors: | David Antoš, Vojtěch Řehák |
| Further information | |
|---|---|
| Citation: | ANTOŠ, David  - ŘEHÁK, Vojtěch. Routing and Level 2 Addressing in a Hardware Accelerator for Network Applications. In ICT 2006, 13th International Conference on Telecommunications. Funchal, Madeira : University of Aveiro, Portugal, 2006. ISBN 972-98368-4-1, pp. 1-4. 8.5.2005, Funchal, Portugal. |
| Original language: | English |
| Field: | Use of computers, robotics and its application |
| Type: | Article in Proceedings |
| Keywords: | routing; L2 addressing; hardware acceleration |
Personal computers are known to be highly usable as internet routers. To overcome their throughput limitations, a hardware accelerator can be employed. For the purposes of packet classification in the accelerator, we investigate a way to combine routing, level 2 addressing, and packet filtering into a single lookup structure. This paper describes the first part of the process: a method to combine routing and level 2 addressing to a single lookup. A formal model of routing and level 2 addressing is presented and used to prove correctness of the method and its equivalence to operating system behaviour.
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