prof. RNDr. Jan Strejček, Ph.D.
Professor, Department of Computer Science
Office: C414
Botanická 554/68a
602 00 Brno
Phone: | +420 549 49 6941 |
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E‑mail: |
social and academic networks: |
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Total number of publications: 86
2019
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Generic Emptiness Check for Fun and Profit
Automated Technology for Verification and Analysis - 17th International Symposium, ATVA 2019, Taipei, Taiwan, October 28-31, 2019, Proceedings, year: 2019
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LTL to Smaller Self-Loop Alternating Automata and Back
Theoretical Aspects of Computing - ICTAC 2019 - 16th International Colloquium, Hammamet, Tunisia, October 31 - November 4, 2019, Proceedings, year: 2019
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ltl3tela: LTL to Small Deterministic or Nondeterministic Emerson-Lei Automata
Automated Technology for Verification and Analysis - 17th International Symposium, ATVA 2019, Taipei, Taiwan, October 28-31, 2019, Proceedings, year: 2019
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Q3B: An Efficient BDD-based SMT Solver for Quantified Bit-Vectors
CAV 2019: Computer Aided Verification, year: 2019
2018
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Abstraction of Bit-Vector Operations for BDD-Based SMT Solvers
Theoretical Aspects of Computing – ICTAC 2018, year: 2018
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Is Satisfiability of Quantified Bit-Vector Formulas Stable Under Bit-Width Changes?
LPAR-22. 22nd International Conference on Logic for Programming, Artificial Intelligence and Reasoning, year: 2018
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Joint Forces for Memory Safety Checking
Model Checking Software. SPIN 2018, year: 2018
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On the complexity of the quantified bit-vector arithmetic with binary encoding
Information Processing Letters, year: 2018, volume: 135, edition: červenec 2018, DOI
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Symbiotic 5: Boosted Instrumentation (Competition Contribution)
Tools and Algorithms for the Construction and Analysis of Systems, 24th International Conference, Proceedings, Part II, year: 2018
2017
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On Simplification of Formulas with Unconstrained Variables and Quantifiers
Theory and Applications of Satisfiability Testing – SAT 2017, year: 2017