doc. RNDr. Vojtěch Řehák, Ph.D.
Vice-dean for curricula and internationalisation, Faculty of Informatics
Office: C436
Botanická 554/68a
602 00 Brno
Phone: | +420 549 49 4687 |
---|---|
E‑mail: |
social and academic networks: |
---|
Total number of publications: 66
2005
-
Refining Undecidability Border of Weak Bisimilarity. (full version of INFINITY 2005 paper)
Year: 2005, type: R&D Presentation
-
Routing and Filtering in a Single Operation
Year: 2005, type: R&D Presentation
2004
-
Extended Process Rewrite Systems: Expressiveness and Reachability
CONCUR 2004 - Concurrency Theory, year: 2004
-
Hardware Router's Lookup Machine and its Formal Verification
ICN'2004 Conference Proceedings, year: 2004
-
How to Formalize FPGA Hardware Design
Year: 2004, type: R&D Presentation
-
On Extensions of Process Rewrite Systems: Rewrite Systems with Weak Finite-State Unit
INFINITY'2003: 5th International Workshop on Verification of Infinite-State Systems, year: 2004
-
On the Expressive Power of Extended Process Rewrite Systems
BRICS Report Series, year: 2004, volume: 2004, edition: RS-04-7
-
Reachability for Extended Process Rewrite Systems
MOVEP'04: 6th school on MOdeling and VErifying parallel Processes, year: 2004
-
Verification Process of Hardware Design in Liberouter Project
Year: 2004, type: R&D Presentation
-
Verification Results in Liberouter Project
Year: 2004, type: R&D Presentation