Publication details

A Simulator for LLVM Bitcode

Authors

ROČKAI Petr BARNAT Jiří

Year of publication 2019
Type Article in Proceedings
Conference 24th International Conference on Formal Methods for Industrial Critical Systems, FMICS 2019
MU Faculty or unit

Faculty of Informatics

Citation
Web https://link.springer.com/chapter/10.1007%2F978-3-030-27008-7_8
Doi http://dx.doi.org/10.1007/978-3-030-27008-7_8
Keywords simulator; LLVM; verification; counterexample
Description In this paper, we introduce an interactive simulator for programs in the form of LLVM bitcode. The main features of the simulator include precise control over thread scheduling, automatic checkpoints and reverse stepping, support for source-level information about functions and variables in C and C++ programs and structured heap visualisation. Additionally, the simulator is compatible with DiVM (DIVINE VM) hypercalls, which makes it possible to load, simulate and analyse counterexamples from an existing model checker.
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