Publication details
Architecture model for approximate palindrome detection
| Authors | |
|---|---|
| Year of publication | 2009 |
| Type | Article in Proceedings |
| Conference | 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems |
| MU Faculty or unit | |
| Citation | |
| Field | Computer hardware and software |
| Keywords | FPGA; approximate palindrome |
| Description | We present an architecture for logical circuits that could be used to search for approximate palindromes when implemented on an FPGA chip |
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