Informace o projektu
Preparation of new training courses on validation and verification of silicon chips

As a part of the project, materials will be developed prepared for two new courses taught at the Faculty of Informatics, Masaryk University. These courses will focus on Validation of Silicon Chip Designs and Verification of Silicon Chip Designs. The courses are being developed and consulted in cooperation with the industrial partner, Renesas. The classes will be offered once per academic year.
The instruction will include practical exercises and workshops. To support the teaching, it will be necessary to acquire appropriate hardware and software equipment for demonstrations and hands-on examples, such as laboratory equipment including FPGA development kits and software licenses for silicon chip design systems and their simulation.