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Design Specification as a Basis to Hardware Simulation

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KUZNÍK Ondřej JAKUBÍK Daniel

Rok publikování 2007
Druh Prezentace v oblasti VaV (AV tvorba, WEB aplikace apod.)
Fakulta / Pracoviště MU

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Popis While developing a hardware design, especially programmable hardware, it has proven useful to detect the most critical properties of a concept prior to implementing it. If a simulation method is chosen to gain such knowledge it is vital that it be able to create and adapt a suitable model on the fly. In this technical report we describe an approach meeting that criteria. It leads to an easily amendable behavioural simulation model readily applicable to any phase of hardware development. It then allows us to obtain fair estimates of many properties of the design in progress. This way enables to point out a shortfall very soon while the cost of reviewing the implementation or even the specification is still low. As the implementation becomes available, the model can then easily be adjusted and later even reused if the design becomes part of a more complex structure. The methodology is demonstrated on a recent simulation of a high-speed network design.

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